When the objects of a makefile are created only by implicit rules, an alternative style of makefile is possible. In this style of makefile, you group entries by their prerequisites instead of by their targets. Here is what one looks like:
objects = main.o kbd.o command.o display.o \
insert.o search.o files.o utils.o
edit : $(objects)
cc -o edit $(objects)
$(objects) : defs.h
kbd.o command.o files.o : command.h
display.o insert.o search.o files.o : buffer.h
Here defs.h is given as a prerequisite of all the object files; command.h and buffer.h are prerequisites of the specific object files listed for them.
Whether this is better is a matter of taste: it is more compact, but some people dislike it because they find it clearer to put all the information about each target in one place.
Compiling a program is not the only thing you might want to write rules for. Makefiles commonly tell how to do a few other things besides compiling a program: for example, how to delete all the object files and executables so that the directory is ‘clean’.
Here is how we
could write a make rule for cleaning our example editor:
clean:
rm edit $(objects)
In practice, we might want to write the rule in a somewhat more complicated manner to handle unanticipated situations. We would do this:
.PHONY : clean
clean :
-rm edit $(objects)
This prevents make from getting confused by an actual file
called clean and causes it to continue in spite of errors from
rm. (See Phony Targets, and Errors in
Recipes.)
A rule such as this should not be placed at the beginning of the
makefile, because we do not want it to run by default! Thus, in the
example makefile, we want the rule for edit, which recompiles
the editor, to remain the default goal.
Since clean is not a prerequisite of edit, this rule will not
run at all if we give the command ‘make’ with no arguments. In
order to make the rule run, we have to type ‘make clean’.
See How to Run make.